In these introductory posts we discuss the FPGA development process from start to finish. This includes synthesis, place and route, timing and verification. However, we do not look at the coding of FPGAs in detail in these posts.
If you are new to FPGAs then it is recommended to read the posts in this series before going through the VHDL tutorials or Verilog tutorials which cover programming in more depth.
Alternatively, you may wish to take one of these verilog or VHDL courses which also feature hands-on, practical examples after reading through the posts here.